- 您现在的位置：买卖IC网 > Sheet目录326 > FL103M (Fairchild Semiconductor)IC PWM CTLR FLYBACK 8-SOIC
technique TRUECURRENT , constant current output
voltage at the end of the diode conduction time (t DIS ),
the output voltage (V O ) information can be obtained. The
internal error amplifier for output voltage regulation
( EAV ) compares the sampled voltage with an internal
precise reference to generate error voltage ( V COMV ),
which determines the duty cycle of the MOSFET ( Q1 ) in
Constant Voltage Mode.
Constant Current Regulation
The output current ( I O ) can be estimated using the peak
drain current ( I PK ) and inductor current discharge time
( t DIS ) since output current ( I O ) is same as the average of
the diode current ( I F_AVG ) in steady state. The output
current estimator ( I O Estimator ) determines the peak
value of the drain current with a peak detection circuit
and calculates the output current ( I O ) using the inductor
discharge time ( t DIS ) and switching period ( t S ). This
output information is compared with an internal precise
reference to generate error voltage ( V COMI ), which
determines the duty cycle of the MOSFET ( Q1 ) in
Constant Current Mode. With Fairchild’s innovative
?
can be precisely controlled.
Voltage and Current Error Amplifier
Of the two error voltages, V COMV and V COMI , the small
one determines the duty cycle. Therefore, during
Constant Voltage Regulation Mode, V COMV determines
the duty cycle while V COMI is saturated to HIGH. During
Constant Current Regulation Mode, V COMI determines
the duty cycle while V COMV is saturated to HIGH.
Operating Current
The operating current is typically 3.2 mA. The small
operating current results in higher efficiency and
Frequency Hopping
EMI reduction is accomplished by frequency hopping,
which spreads the energy over a wider frequency range
than the bandwidth measured by the EMI test
equipment. FL103 has an internal frequency hopping
circuit that changes the switching frequency between
47 kHz and 53 kHz.
High-Voltage Startup
Figure 23 shows the startup block. The HV pin is
connected to the line input or DC link capacitor (C DC ).
During startup, the internal startup circuit is enabled.
Meanwhile, line input supplies the current (I Start ) to
charge the V DD capacitor (C VDD ). When the V DD voltage
reaches V DD-ON (16 V) and V DC is enough high to avoid
brownout, the internal startup circuit is disabled,
blocking I Start from flowing into the HV pin. Once the IC
turns on, C VDD is the only energy source to supply the IC
consumption current before the PWM starts to switch.
Thus, C VDD must be large enough to prevent V DD-OFF
(7.5 V) before the power can be delivered from the
auxiliary winding. To avoid the surge from input source,
the R Start is connected between C DC and HV, with a
recommended value of 100 k ? .
reduces the V DD capacitor (C VDD ) requirement. Once
FL103 enters Green Mode, the operating current is
reduced to 0.95 mA, assisting the power supply in
Figure 23.
Protections
Startup Block
meeting power conservation requirements.
Green Mode Operation
The FL103 uses voltage regulation error amplifier output
(V COMV ) as an indicator of the output load and modulates
the PWM frequency, as shown in Figure 22. The
switching frequency decreases as load decreases. In
heavy load conditions, the switching frequency is fixed
at 50 kHz. Once V COMV decreases below 2.5 V, the
PWM frequency linearly decreases from 50 kHz. When
FL103 enters into green load, the PWM frequency is
reduced to a minimum frequency of 370 Hz., gaining
power saving power to help meet international power
conservation requirements.
The FL103 has several self-protection functions; over-
voltage protection, thermal shutdown protection,
brownout protection, and pulse-by-pulse current limit.
V DD Under-Voltage Lockout (UVLO)
The turn-on and turn-off thresholds are fixed internally at
16 V and 7.5 V, respectively. During startup, the V DD
capacitor (C VDD ) must be charged to 16 V. The V DD
capacitor (C VDD ) continues to supply V DD until power can
be delivered from the auxiliary winding of the main
transformer. V DD is not allowed to drop below 7.5 V
during this startup process. This UVLO hysteresis
window ensures that V DD capacitor (C VDD ) properly
supplies V DD during startup.
V DD Over-Voltage Protection (OVP)
The OVP prevents damage from over-voltage
conditions. If the V DD voltage exceeds 28 V at open-loop
feedback condition, the OVP is triggered and the PWM
switching is disabled. The OVP has a debounce time
(typically 200 μs) to prevent false triggering due to
switching noises.
Thermal Shutdown Protection (TSD)
The built-in temperature-sensing circuit shuts down
PWM output if the junction temperature exceeds 140°C.
Figure 22.
Switching Frequency as Output Load
There is a hysteresis of 15°C.
? 2012 Fairchild Semiconductor Corporation
FL103 ? Rev. 1.0.2
11
www.fairchildsemi.com
发布紧急采购，3分钟左右您将得到回复。
相关PDF资料
FL6300AMY
IC CTLR PWM QUASI CURR 8-SOIC
FL7701MX
IC LED DRIVER PFC BUCK 8-SOIC
FL7732M_F116
IC LED DRIVER PFC PRIMARY 8-SOIC
FLASHPRO LITE
KIT PROGRAMMER FLASHPRO LITE
FLS2100XS
IC CTLR FPS HALF BRIDG LCC 9-SIP
FMD15.24G
1500W 24V DC-INPUT 48V RECTIFIER
FMP25.48G
2500W 48V AC-INPUT RECTIFIER
FND850-12DRG
FRONT END DC/DC 850W 12V
相关代理商/技术参数
FL1041
制造商:Pulse 功能描述:- Bulk
FL1043
制造商:Pulse 功能描述:10BT FILTER WITH CMC - Bulk 制造商:Pulse Electronics Corporation 功能描述:10BT FILTER WITH CMC
FL1046
制造商:Pulse 功能描述:10BTFILTERWITHCMC - Bulk
FL1046NL
制造商:Pulse 功能描述:10BTFILTERWITHCMC HAZMAT - Bulk
FL1057-002
制造商:Pulse 功能描述:- Bulk
FL1059
制造商:Pulse 功能描述:10BT FILTER WITH CMC&RES - Bulk
FL1065
制造商:Pulse 功能描述:10BT FILTER WITH CMC&RES. - Bulk 制造商:Pulse Electronics Corporation 功能描述:10BT FILTER WITH CMC&RES.
FL1066
功能描述:变压器音频和信号 10BT FILTER WITH CMC
RoHS:否 制造商:Skyworks Solutions, Inc. 频率范围:810 MHz to 960 MHz 初级线圈阻抗: 次级线圈阻抗: 绝缘电压:23 dB 工作温度范围:- 40 C to + 85 C 端接类型:SMD/SMT 尺寸:6 mm L x 4.9 mm W x 1.6 mm H 产品:Splitters and Combiners